Win32 Error 31 During Post-smash Read Op Lakka
Fatal Errors¶
[ä¸æ–‡]
Overview¶
In sure situations, execution of the plan tin can not exist continued in a well defined way. In ESP-IDF, these situations include:
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CPU Exceptions: Illegal Instruction, Load/Store Alignment Fault, Load/Shop Prohibited fault, Double Exception.
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System level checks and safeguards:
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Interrupt watchdog timeout
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Task watchdog timeout (but fatal if CONFIG_ESP_TASK_WDT_PANIC is set)
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Cache access mistake
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Brownout detection consequence
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Stack overflow
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Stack smashing protection check
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Heap integrity check
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Undefined beliefs sanitizer (UBSAN) checks
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Failed assertions, via
assert,configASSERTand similar macros.
This guide explains the procedure used in ESP-IDF for handling these errors, and provides suggestions on troubleshooting the errors.
Panic Handler¶
Every mistake cause listed in the Overview volition be handled by the panic handler.
The panic handler will get-go by printing the crusade of the error to the console. For CPU exceptions, the message will exist similar to
Guru Meditation Error: Cadre 0 panic'ed (IllegalInstruction). Exception was unhandled.
For some of the organisation level checks (interrupt watchdog, enshroud access error), the message will be like to
Guru Meditation Error: Core 0 panic'ed (Enshroud disabled only cached memory region accessed). Exception was unhandled.
In all cases, the fault cause will be printed in parentheses. Come across Guru Meditation Errors for a listing of possible error causes.
Subsequent beliefs of the panic handler can be set using CONFIG_ESP_SYSTEM_PANIC configuration choice. The available options are:
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Print registers and reboot (
CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT) — default pick.This volition print annals values at the point of the exception, print the backtrace, and restart the chip.
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Print registers and halt (
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT)Similar to the above pick, simply halt instead of rebooting. External reset is required to restart the program.
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Silent reboot (
CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT)Don't print registers or backtrace, restart the chip immediately.
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Invoke GDB Stub (
CONFIG_ESP_SYSTEM_PANIC_GDBSTUB)Start GDB server which can communicate with GDB over console UART port. This choice will simply provide read-only debugging or mail service-mortem debugging. Run across GDB Stub for more details.
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Invoke dynamic GDB Stub (
ESP_SYSTEM_GDBSTUB_RUNTIME)Offset GDB server which can communicate with GDB over console UART port. This option allows the user to debug a plan at run time and set up intermission points, alter the execution, etc. See GDB Stub for more than details.
The beliefs of the panic handler is affected by two other configuration options.
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If CONFIG_ESP32_DEBUG_OCDAWARE is enabled (which is the default), the panic handler volition observe whether a JTAG debugger is continued. If it is, execution will be halted and control will be passed to the debugger. In this example, registers and backtrace are not dumped to the console, and GDBStub / Core Dump functions are not used.
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If the Cadre Dump feature is enabled, then the system state (task stacks and registers) volition exist dumped to either Wink or UART, for after analysis.
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If CONFIG_ESP_PANIC_HANDLER_IRAM is disabled (disabled past default), the panic handler code is placed in flash memory, non IRAM. This means that if ESP-IDF crashes while flash enshroud is disabled, the panic handler volition automatically re-enable wink cache before running GDB Stub or Cadre Dump. This adds some small-scale risk, if the flash enshroud condition is also corrupted during the crash.
If this option is enabled, the panic handler lawmaking (including required UART functions) is placed in IRAM, and hence will decrease the usable memory space in SRAM. But this may be necessary to debug some circuitous issues with crashes while flash cache is disabled (for example, when writing to SPI flash) or when flash cache is corrupted when an exception is triggered.
The following diagram illustrates the panic handler behavior:
Panic Handler Flowchart (click to overstate)¶
Register Dump and Backtrace¶
Unless the CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT pick is enabled, the panic handler prints some of the CPU registers, and the backtrace, to the console
Core 0 register dump : PC : 0x400e14ed PS : 0x00060030 A0 : 0x800d0805 A1 : 0x3ffb5030 A2 : 0x00000000 A3 : 0x00000001 A4 : 0x00000001 A5 : 0x3ffb50dc A6 : 0x00000000 A7 : 0x00000001 A8 : 0x00000000 A9 : 0x3ffb5000 A10 : 0x00000000 A11 : 0x3ffb2bac A12 : 0x40082d1c A13 : 0x06ff1ff8 A14 : 0x3ffb7078 A15 : 0x00000000 SAR : 0x00000014 EXCCAUSE : 0x0000001d EXCVADDR : 0x00000000 LBEG : 0x4000c46c LEND : 0x4000c477 LCOUNT : 0xffffffff Backtrace : 0x400e14ed : 0x3ffb5030 0x400d0802 : 0x3ffb5050 The annals values printed are the register values in the exception frame, i.e., values at the moment when the CPU exception or another fatal error has occurred.
A Register dump is non printed if the panic handler has been executed as a result of an abort() phone call.
In some cases, such as interrupt watchdog timeout, the panic handler may print boosted CPU registers (EPC1-EPC4) and the registers/backtrace of the code running on the other CPU.
The backtrace line contains PC:SP pairs, where PC is the Plan Counter and SP is Stack Pointer, for each stack frame of the electric current job. If a fatal error happens inside an ISR, the backtrace may include PC:SP pairs both from the task which was interrupted, and from the ISR.
If IDF Monitor is used, Program Counter values will be converted to code locations (office name, file proper noun, and line number), and the output will exist annotated with additional lines:
Core 0 register dump : PC : 0x400e14ed PS : 0x00060030 A0 : 0x800d0805 A1 : 0x3ffb5030 0x400e14ed : app_main at / Users / user / esp / example / main / main . cpp : 36 A2 : 0x00000000 A3 : 0x00000001 A4 : 0x00000001 A5 : 0x3ffb50dc A6 : 0x00000000 A7 : 0x00000001 A8 : 0x00000000 A9 : 0x3ffb5000 A10 : 0x00000000 A11 : 0x3ffb2bac A12 : 0x40082d1c A13 : 0x06ff1ff8 0x40082d1c : _calloc_r at / Users / user / esp / esp - idf / components / newlib / syscalls . c : 51 A14 : 0x3ffb7078 A15 : 0x00000000 SAR : 0x00000014 EXCCAUSE : 0x0000001d EXCVADDR : 0x00000000 LBEG : 0x4000c46c LEND : 0x4000c477 LCOUNT : 0xffffffff Backtrace : 0x400e14ed : 0x3ffb5030 0x400d0802 : 0x3ffb5050 0x400e14ed : app_main at / Users / user / esp / example / principal / main . cpp : 36 0x400d0802 : main_task at / Users / user / esp / esp - idf / components / esp32 / cpu_start . c : 470 To find the location where a fatal error has happened, look at the lines which follow the "Backtrace" line. Fatal error location is the top line, and subsequent lines show the phone call stack.
GDB Stub¶
If the CONFIG_ESP_SYSTEM_PANIC_GDBSTUB option is enabled, the panic handler will not reset the bit when a fatal error happens. Instead, information technology will start a GDB remote protocol server, usually referred to as GDB Stub. When this happens, a GDB example running on the host computer tin be instructed to connect to the ESP32 UART port.
If IDF Monitor is used, GDB is started automatically when a GDB Stub prompt is detected on the UART. The output looks like this:
Entering gdb stub now. $T0b#e6GNU gdb (crosstool-NG crosstool-ng-1.22.0-80-gff1f415) seven.10 Copyright (C) 2022 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or afterward <http://gnu.org/licenses/gpl.html> This is free software: yous are gratuitous to change and redistribute information technology. There is NO WARRANTY, to the extent permitted past police force. Blazon "prove copying" and "show warranty" for details. This GDB was configured equally "--host=x86_64-build_apple-darwin16.3.0 --target=xtensa-esp32-elf". Type "prove configuration" for configuration details. For issues reporting instructions, delight see: <http://www.gnu.org/software/gdb/bugs/>. Discover the GDB manual and other documentation resources online at: <http://www.gnu.org/software/gdb/documentation/>. For help, type "help". Blazon "apropos word" to search for commands related to "word"... Reading symbols from /Users/user/esp/example/build/example.elf...done. Remote debugging using /dev/cu.usbserial-31301 0x400e1b41 in app_main () at /Users/user/esp/instance/primary/main.cpp:36 36 *((int*) 0) = 0; (gdb) The GDB prompt can be used to audit CPU registers, local and static variables, and capricious locations in memory. It is not possible to set breakpoints, change the PC, or continue execution. To reset the program, exit GDB and perform an external reset: Ctrl-T Ctrl-R in IDF Monitor, or using the external reset push button on the development board.
Guru Meditation Errors¶
This department explains the meaning of different fault causes, printed in parens later the Guru Meditation Error: Core panic'ed message.
IllegalInstruction¶
This CPU exception indicates that the pedagogy which was executed was not a valid instruction. Most common reasons for this error include:
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FreeRTOS task function has returned. In FreeRTOS, if a task part needs to end, information technology should call
vTaskDelete()and delete itself, instead of returning. -
Failure to read next instruction from SPI wink. This usually happens if:
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Application has reconfigured the SPI flash pins as some other office (GPIO, UART, etc.). Consult the Hardware Design Guidelines and the datasheet for the chip or module for details nigh the SPI wink pins.
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Some external device has accidentally been connected to the SPI flash pins, and has interfered with communication between ESP32 and SPI flash.
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In C++ lawmaking, exiting from a non-void function without returning a value is considered to be an undefined behavior. When optimizations are enabled, the compiler volition oft omit the epilogue in such functions. This most frequently results in an IllegalInstruction exception. Past default, ESP-IDF build system enables
-Werror=return-typewhich means that missing return statements are treated as compile time errors. Nevertheless if the application projection disables compiler warnings, this issue might go undetected and the IllegalInstruction exception will occur at run time.
InstrFetchProhibited¶
This CPU exception indicates that the CPU could non read an instruction because the address of the instruction does non belong to a valid region in instruction RAM or ROM.
Usually, this means an attempt to call a function pointer, which does not point to valid code. PC (Programme Counter) annals can be used as an indicator: it will be zero or will contain a garbage value (non 0x4xxxxxxx ).
LoadProhibited, StoreProhibited¶
These CPU exceptions happen when an awarding attempts to read from or write to an invalid retentiveness location. The address which has been written/read is found in the EXCVADDR register in the register dump. If this address is zero, information technology usually means that the application has attempted to dereference a Nothing pointer. If this accost is shut to nothing, it usually means that the application has attempted to access a member of a structure, but the pointer to the structure is Nothing. If this accost is something else (garbage value, not in 0x3fxxxxxx - 0x6xxxxxxx range), it likely means that the pointer used to admission the information is either not initialized or has been corrupted.
IntegerDivideByZero¶
Application has attempted to do an integer division by nothing.
LoadStoreAlignment¶
Application has attempted to read or write a memory location, and the accost alignment does not lucifer the load/store size. For instance, a 32-chip read can only be washed from a 4-byte aligned address, and a 16-chip write tin only be washed to a 2-byte aligned address.
LoadStoreError¶
This exception may happen in the following cases:
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If the awarding has attempted to do an 8- or sixteen- bit read to, or write from, a memory region which merely supports 32-bit reads/writes. For case, dereferencing a
char*pointer to pedagogy retentivity (IRAM, IROM) volition result in such an error. -
If the application has attempted to write to a read-only memory region, such as IROM or DROM.
Unhandled debug exception¶
This will unremarkably be followed by a message like:
Debug exception reason : Stack canary watchpoint triggered ( task_name ) This error indicates that the awarding has written past the stop of the stack of the task with name task_name . Note that not every stack overflow is guaranteed to trigger this mistake. It is possible that the chore writes to retentiveness beyond the stack canary location, in which case the watchpoint will not be triggered.
Interrupt wdt timeout on CPU0 / CPU1¶
Indicates that an interrupt watchdog timeout has occurred. See Watchdogs for more information.
Cache disabled merely cached retention region accessed¶
In some situations, ESP-IDF will temporarily disable access to external SPI Flash and SPI RAM via caches. For example, this happens when spi_flash APIs are used to read/write/erase/mmap regions of SPI Flash. In these situations, tasks are suspended, and interrupt handlers not registered with ESP_INTR_FLAG_IRAM are disabled. Make sure that whatever interrupt handlers registered with this flag have all the code and data in IRAM/DRAM. Refer to the SPI flash API documentation for more than details.
Other Fatal Errors¶
Brownout¶
ESP32 has a born brownout detector, which is enabled by default. The brownout detector can trigger a system reset if the supply voltage goes below a safe level. The brownout detector can be configured using CONFIG_ESP32_BROWNOUT_DET and CONFIG_ESP32_BROWNOUT_DET_LVL_SEL options.
When the brownout detector triggers, the following message is printed:
Brownout detector was triggered The chip is reset afterward the message is printed.
Note that if the supply voltage is dropping at a fast rate, only function of the message may exist seen on the console.
Corrupt Heap¶
ESP-IDF'southward heap implementation contains a number of run-fourth dimension checks of the heap construction. Additional checks ("Heap Poisoning") can exist enabled in menuconfig. If one of the checks fails, a message similar to the following will be printed:
CORRUPT HEAP : Bad tail at 0x3ffe270a . Expected 0xbaad5678 got 0xbaac5678 exclamation "caput != Cypher" failed : file "/Users/user/esp/esp-idf/components/heap/multi_heap_poisoning.c" , line 201 , function : multi_heap_free arrest () was called at PC 0x400dca43 on core 0 Consult Heap Memory Debugging documentation for further information.
Stack Not bad¶
Stack swell protection (based on GCC -fstack-protector* flags) can be enabled in ESP-IDF using CONFIG_COMPILER_STACK_CHECK_MODE choice. If stack swell is detected, message similar to the following volition exist printed:
Stack smashing protect failure! abort() was called at PC 0x400d2138 on core 0 Backtrace: 0x4008e6c0:0x3ffc1780 0x4008e8b7:0x3ffc17a0 0x400d2138:0x3ffc17c0 0x400e79d5:0x3ffc17e0 0x400e79a7:0x3ffc1840 0x400e79df:0x3ffc18a0 0x400e2235:0x3ffc18c0 0x400e1916:0x3ffc18f0 0x400e19cd:0x3ffc1910 0x400e1a11:0x3ffc1930 0x400e1bb2:0x3ffc1950 0x400d2c44:0x3ffc1a80 0 The backtrace should point to the function where stack smashing has occurred. Check the part code for unbounded access to local arrays.
Undefined behavior sanitizer (UBSAN) checks¶
Undefined beliefs sanitizer (UBSAN) is a compiler feature which adds run-time checks for potentially incorrect operations, such as:
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overflows (multiplication overflow, signed integer overflow)
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shift base or exponent errors (e.g. shift by more 32 $.25)
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integer conversion errors
Encounter GCC documentation of -fsanitize=undefined option for the complete list of supported checks.
Enabling UBSAN¶
UBSAN is disabled by default. It tin be enabled at file, component, or project level past calculation the -fsanitize=undefined compiler option in the build organisation.
When enabling UBSAN for lawmaking which uses the SOC hardware register header files ( soc/xxx_reg.h ), it is recommended to disable shift-base of operations sanitizer using -fno-sanitize=shift-base option. This is due to the fact that ESP-IDF register header files currently contain patterns which cause false positives for this specific sanitizer choice.
To enable UBSAN at project level, add the following code at the end of the project'due south CMakeLists.txt file:
idf_build_set_property ( COMPILE_OPTIONS "-fsanitize=undefined" "-fno-sanitize=shift-base of operations" APPEND ) Alternatively, pass these options through the EXTRA_CFLAGS and EXTRA_CXXFLAGS environment variables.
Enabling UBSAN results in significant increment of lawmaking and information size. Near applications, except for the trivial ones, will not fit into the available RAM of the microcontroller when UBSAN is enabled for the whole awarding. Therefore it is recommended that UBSAN is instead enabled for specific components nether examination.
To enable UBSAN for a specific component ( component_name ) from the project's CMakeLists.txt file, add the following code at the finish of the file:
idf_component_get_property(lib component_name COMPONENT_LIB) target_compile_options(${lib} Individual "-fsanitize=undefined" "-fno-sanitize=shift-base of operations") To enable UBSAN for a specific component ( component_name ) from CMakeLists.txt of the aforementioned component, add the following at the end of the file:
target_compile_options(${COMPONENT_LIB} Individual "-fsanitize=undefined" "-fno-sanitize=shift-base") UBSAN output¶
When UBSAN detects an error, a message and the backtrace are printed, for example:
Undefined behavior of blazon out_of_bounds Backtrace : 0x4008b383 : 0x3ffcd8b0 0x4008c791 : 0x3ffcd8d0 0x4008c587 : 0x3ffcd8f0 0x4008c6be : 0x3ffcd950 0x400db74f : 0x3ffcd970 0x400db99c : 0x3ffcd9a0 When using IDF Monitor, the backtrace will be decoded to function names and source code locations, pointing to the location where the consequence has happened (here it is main.c:128 ):
0x4008b383 : panic_abort at / path / to / esp - idf / components / esp_system / panic . c : 367 0x4008c791 : esp_system_abort at / path / to / esp - idf / components / esp_system / system_api . c : 106 0x4008c587 : __ubsan_default_handler at / path / to / esp - idf / components / esp_system / ubsan . c : 152 0x4008c6be : __ubsan_handle_out_of_bounds at / path / to / esp - idf / components / esp_system / ubsan . c : 223 0x400db74f : test_ub at principal . c : 128 0x400db99c : app_main at master . c : 56 ( discriminator 1 ) The types of errors reported by UBSAN can be as follows:
| Name | Meaning |
|---|---|
| | Wrong pointer value: goose egg, unaligned, not compatible with the given type. |
| | Integer overflow during addition, subtraction, multiplication, negation. |
| | Integer division by 0 or |
| | Overflow in left or right shift operators. |
| | Access outside of bounds of an array. |
| | Unreachable code executed. |
| | Non-void part has reached its stop without returning a value (C++ only). |
| | Size of variable length array is non positive. |
| | Value of |
| | Null argument passed to a function which is declared with a |
| | Null value returned from a function which is declared with |
| | |
| | Overflow in pointer arithmetic. |
Source: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-guides/fatal-errors.html
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